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74LVC240A Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
Product specification Supersedes data of 1998 May 20 2002 Oct 02
Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
FEATURES * 5 V tolerant inputs/outputs, for interfacing with 5 V logic * Supply voltage range from 1.2 to 3.6 V * Complies with JEDEC standard no. 8-1A * CMOS low power consumption * Direct interface with TTL levels * High-impedance when VCC = 0 V. DESCRIPTION
74LVC240A
The 74LVC240A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. These features allow the use of these devices as translators in a mixed 3.3 and 5 V environment. The 74LVC240A is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times. The 74LVC240A is functionally identical to the 74LVC244A, which has non-inverting outputs.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 2.5 ns. SYMBOL tPHL/tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; (CL x VCC2 x fo) = sum of outputs. 2. The condition is VI = GND to VCC. PARAMETER propagation delay nAn to nYn input capacitance power dissipation capacitance per buffer notes 1 and 2 CONDITIONS CL = 50 pF; VCC = 3.3 V TYPICAL 3.5 5.0 20 ns pF pF UNIT
2002 Oct 02
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Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
FUNCTION TABLE See note 1. INPUT nOE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state. ORDERING INFORMATION TYPE NUMBER 74LVC240AD 74LVC240ADB 74LVC240APW PINNING PIN 1 2, 4, 6, 8 3, 5, 7, 9 10 11, 13, 15, 17 12, 14, 16, 18 19 20 SYMBOL 1OE 1A0 to 1A3 2Yo to 2Y3 GND 2A3 to 2A0 1Y3 to 1Y0 2OE VCC data inputs data outputs ground (0 V) data inputs data outputs output enable input (active LOW) power supply DESCRIPTION output enable input (active LOW) TEMPERATURE RANGE -40 to +85 C -40 to +85 C -40 to +85 C PACKAGE PINS 20 20 20 PACKAGE SO-20 SSOP-20 TSSOP-20 nAn L H X
74LVC240A
OUTPUT nYn H L Z
MATERIAL plastic plastic plastic
CODE SOT163-1 SOT339-1 SOT360-1
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Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
74LVC240A
handbook, halfpage
1OE 1 1A0 2 2Y0 3 1A1 4 2Y1 5 1A2 6 2Y2 7 1A3 8 2Y3 9 GND 10
MGU777
20 VCC 19 2OE 18 1Y0 17 2A0 16 1Y1 15 2A1 14 1Y2 8 13 2A2 12 1Y3 11 2A3 11 1 19 6 13
handbook, halfpage 2
1A0 2A0 1A1 2A1 1A2 2A2 1A3 2A3 1OE 2OE
1Y0 18 2Y0 3
17 4 15
1Y1 16 2Y1 5
1Y2 14 2Y2 7
1Y3 12 2Y3 9
MGU779
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
2
1A0
1Y0
18
4
handbook, halfpage
1A1
1Y1
16
1
EN 6 1A2 1Y2 14 18 16 14 12 1 1OE 8 1A3 1Y3 12
2 4 6 8
19
17 EN 9 7 5 3 11
MGU778
2A0
2Y0
3
11 13 15 17
15
2A1
2Y1
5
13
2A2
2Y2
7
2A3 2OE
2Y3
9
19
MGU780
Fig.3 Logic symbol (IEEE/IEC).
Fig.4 Functional diagram.
2002 Oct 02
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Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
RECOMMENDED OPERATING INSTRUCTIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times output HIGH or LOW state output 3-state in free air VCC = 1.2 to 2.7 V VCC = 2.7 to 3.6 V CONDITIONS for low voltage applications MIN. 1.2 0 0 0 -40 0 0
74LVC240A
MAX. 3.6 3.6 5.5 VCC 5.5 +85 20 10 V V V V V
UNIT
for maximum speed performance 2.7
C ns/V ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V); note 1. SYMBOL VCC IIK VI IOK VO PARAMETER supply voltage input diode current input voltage output diode current output voltage VI < 0 note 2 VO > VCC or VO < 0 CONDITIONS - -0.5 - MIN. -0.5 - -50 - 50 - - 50 100 - TYP. - +6.5 - MAX. +6.5 V mA V mA UNIT
output HIGH or LOW state; -0.5 note 2 output 3-state; note 2 -0.5 - - -65 VO = 0 to VCC
VCC + 0.5 V +6.5 - - +150 V mA mA C
IO ICC, IGND Tstg Ptot
output source or sink current VCC or GND current storage temperature power dissipation per package: SO SSOP and TSSOP
above 70 C derates linearly with 8 mW/K above 60 C derates linearly with 5.5 mW/K
- -
500 500
- -
mW mW
Notes 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "Recommended operating instructions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2002 Oct 02
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Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
DC CHARACTERISTICS Over recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL; IO = -12 mA VI = VIH or VIL; IO = -18 mA VI = VIH or VIL; IO = -24 mA VOL LOW-level output voltage VI = VIH or VIL; IO = 12 mA VI = VIH or VIL; IO = 100 A VI = VIH or VIL; IO = 24 mA ILI IOZ Ioff ICC ICC input leakage current 3-state output OFF-state current power off leakage current quiescent supply current VI = 5.5 V or GND; note 2 VI = VIH or VIL; VO = 5.5 V or GND VI or VO = 5.5 V VI = VCC or GND; IO = 0 VCC (V) 1.2 2.7 to 3.6 1.2 2.7 to 3.6 2.7 3.0 3.0 2.7 3.0 3.0 3.6 3.0 0.0 3.6 2.7 to 3.6 VI = VIH or VIL; IO = -100 A 3.0 MIN. VCC 2.0 - - - - - -
74LVC240A
Tamb (C) -40 to +85 TYP.(1) - - GND 0.8 - - - - 0.40 0.20 0.55 5 10 10 10 500 MAX. V V V V V V V V V V V A A A A A UNIT
VCC - 0.5 - VCC - 0.2 VCC VCC - 0.6 - VCC - 0.8 - - - - - - - - - - GND - 0.1 0.1 0.1 0.1 5
additional quiescent VI = VCC - 0.6 V; IO = 0 supply current per input pin
Notes 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 C. 2. The specified overdrive current at the data input forces the data input to the opposite logic input state.
2002 Oct 02
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Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
AC CHARACTERISTICS GND = 0 V; tr = tf 2.5 ns; CL = 50 pF; RL = 500 . CONDITIONS SYMBOL PARAMETER WAVEFORMS tPLH/tPHL propagation delay: 1An to 1Yn; 2An to 2Yn 3-state output enable time: 1OE to 1Yn; 2OE to 2Yn 3-state output disable time: 1OE to 1Yn; 2OE to 2Yn see Figs 5 and 7 VCC (V) 1.2 2.7 3.0 to 3.6 tPZH/tPZL see Figs 6 and 7 1.2 2.7 3.0 to 3.6 tPHZ/tPLZ see Figs 6 and 7 1.2 2.7 3.0 to 3.6 Note: 1. This typical value is measured at VCC = 3.3 V and Tamb = 25 C. AC WAVEFORMS - 1.5 1.5 - 1.5 1.5 - 1.5 1.5 MIN. - 3.5(1) 19.0 - 4.3(1) 17.0 - 3.7(1) Tamb (C) -40 to +85 TYP. 16.0
74LVC240A
UNIT MAX. - 7.5 6.5 - 9.0 8.0 - 8.0 7.0 ns ns ns ns ns ns ns ns ns
VI handbook, halfpage inputs GND tPHL VOH outputs VOL VM VM
MGU781
VM
VM
tPLH
VM = 1.5 V at VCC 2.7 V; VM = 0.5VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load.
Fig.5 Inputs (1An, 2An) to outputs (1Yn, 2Yn) propagation delays.
2002 Oct 02
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Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
74LVC240A
handbook, full pagewidth
VI nOE input GND tPLZ Qn output LOW-to-OFF OFF-to-LOW VCC VM VOL tPHZ Qn output HIGH-to-OFF OFF-to-HIGH VOH VY VM GND outputs enabled outputs disabled outputs enabled
MGU782
VM
tPZL
VX tPZH
VM = 1.5 V at VCC 2.7 V; VM = 0.5VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. VX = VOL + 0.3 V at VCC 2.7 V; VX = VOL + 0.1VCC at VCC < 2.7 V. VY = VOH - 0.3 V at VCC 2.7 V; VY = VOH - 0.1VCC at VCC < 2.7 V.
Fig.6 3-state enable and disable times.
handbook, full pagewidth
S1 VCC PULSE GENERATOR VI D.U.T. RT CL 50 pF RL 500 VO RL 500
2 x VCC open GND
MNA368
VCC < 2.7 V 2.7 to 3.6 V
VI VCC 2.7 V
TEST tPLH/tPLH tPHZ/tPZH tPHZ/tPZH
S1 open 2 x VCC GND
Definitions for test circuits: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.7 Load circuitry for switching times.
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Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
PACKAGE OUTLINES SO20: plastic small outline package; 20 leads; body width 7.5 mm
74LVC240A
SOT163-1
D
E
A X
c y HE vMA
Z 20 11
Q A2 A1 pin 1 index Lp L 1 e bp 10 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 13.0 12.6 0.51 0.49 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT163-1 REFERENCES IEC 075E04 JEDEC MS-013 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
2002 Oct 02
9
Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
74LVC240A
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
D
E
A X
c y HE vMA
Z 20 11
Q A2 pin 1 index A1 (A 3) Lp L 1 e bp 10 wM detail X A
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.0 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 7.4 7.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 0.9 0.5 8 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT339-1 REFERENCES IEC JEDEC MO-150 EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 99-12-27
2002 Oct 02
10
Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
74LVC240A
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
D
E
A
X
c y HE vMA
Z
20
11
Q A2 pin 1 index A1 (A 3) A
Lp L
1
e bp
10
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.10 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 6.6 6.4 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1.0 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.5 0.2 8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC MO-153 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 99-12-27
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Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.
74LVC240A
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
2002 Oct 02
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Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
Suitability of surface mount IC packages for wave and reflow soldering methods PACKAGE(1) BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC(4), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes not suitable not suitable(3)
74LVC240A
SOLDERING METHOD WAVE REFLOW(2) suitable suitable suitable suitable suitable
suitable not not recommended(4)(5) recommended(6)
1. For more detailed information on the BGA packages refer to the "(LF)BGA Application Note" (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2002 Oct 02
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Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION
74LVC240A
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data Qualification
III
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2002 Oct 02
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Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting (3-state)
NOTES
74LVC240A
2002 Oct 02
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Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2002
SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613508/03/pp16
Date of release: 2002
Oct 02
Document order number:
9397 750 10035

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